Table of contents
Short Introduction
The processor implements the CISC architecture: Complex Instruction Set Computing - each instruction is specialised and consist of few microinstructions. Each instruction has own 8-bit opcode so the maximum number of instructions is 256.
Fetch-Decode-Execute Cycle
- Fetch: Address of the next instruction is written from \( \texttt{PC} \) to \(\texttt{MAR}\). Word at this address in memory is written to \( \texttt{REG_IR} \).
- Decode: Logic programmed in EEPROMs decodes the instruction opcode.
- Execute: Successive microcodes produce a sequence of control signals to processor components.
Fetch always takes 2 cycles. Decode + Execute takes a variable number of cycles. Each cycle ends with \( \texttt{MC} \) reset.
General Instruction Table
Fetching instruction:
\( \texttt{REG_MAR} \leftarrow \texttt{PC} \)
\( \texttt{REG_IR} \leftarrow \texttt{MEM[REG_MAR]} \quad \& \quad \texttt{PC} \leftarrow \texttt{PC + 1} \)
| Mnemonic | Arguments | Description |
|---|---|---|
| MOV | REG8, REG8/CONST8/MEM16/MEM8 | Move constant or value from memory or value from register to register |
| MOVAT | MEM16/MEM8/REG16/REG8, REG8/CONST8 | Move constant or value from register to memory at some address |
| NEG | REG8/MEM16/MEM8/STC, REG8 | Calculate negation of value from register and store it in register, memory or stack |
| ADD | REG8/MEM16/MEM8/STC | Calculate addition of REG_A with REG_B and store it in register, memory or stack |
| SUB | REG8/MEM16/MEM8/STC, REG8/REG8/REG8/REG8, REG8/REG8/REG8/REG8 | Calculate subtraction of values from registers and store it in register, memory or stack |
| DIV2 | REG8/MEM16/MEM8/STC, REG8 | Calculate division by 2 of value from register and store it in register, memory or stack |
| INV | REG8/MEM16/MEM8/STC, REG8 | Calculate inversion of value from register and store it in register, memory or stack |
| OR | REG8/MEM16/MEM8/STC | Calculate bitwise OR of REG_A with REG_B and store it in register, memory or stack |
| AND | REG8/MEM16/MEM8/STC | Calculate bitwise AND of REG_A with REG_B and store it in register, memory or stack |
| XOR | REG8/MEM16/MEM8/STC | Calculate bitwise XOR of REG_A with REG_B and store it in register, memory or stack |
| SHR | REG8/MEM16/MEM8/STC, REG8 | Calculate shift right of value from register and store it in register, memory or stack |
| SHL | REG8/MEM16/MEM8/STC, REG8 | Calculate shift left of value from register and store it in register, memory or stack |
| CMP | REG8, REG8 | Compare values from given registers and store result in REG_F |
| CLR | REG8/REG16 | Clear given register |
| INC | REG8/REG16 | Increment given register |
| DEC | REG8/REG16 | Decrement given register |
| JMPIMM | MEM16/REG16 | Jump directly to address given by constant or value from register |
| JMPREL | CONST8/REG8 | Jump relative with offset given by constant or value from register or memory |
| JMPFUN | MEM16 | Push return address to stack and jump to function address given by constant |
| JMPRET | Pop return address from stack and jump to it | |
| PUSH | REG8/REG16/CONST8/MEM16/MEM8 | Push constant, value from register or memory to stack |
| POP | REG8/REG16/MEM16/MEM8 | Pop value from stack to register or memory |
| NOP | - | Do nothing for one cycle |
| SKIP/SKIP1/SKIP2 | - | Skip current/next/next two program instructions |
| ISR | - | Push program counter to stack, set program counter to address of interrupt service routine and start interrupt service routine |
| IRET | - | Pop program counter from stack and exit interrupt service routine |
| INT | - | Triggers interrupt |
| HALT | - | Halt the program |
Detailed Instruction Table
Move Instructions
| No. | Name | Opcode | Description | Total Cycles Number | Executed Microcodes |
|---|---|---|---|---|---|
| 0 | MOVAB | 0b00000001 | Move value from \( \texttt{REG_B} \) to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{REG_B} \) |
| 1 | MOVATH | 0b00000010 | Move value from \( \texttt{REG_TMPH} \) to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPH} \) |
| 2 | MOVATL | 0b00000011 | Move value from \( \texttt{REG_TMPL} \) to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPL} \) |
| 3 | MOVAF | 0b00000100 | Move value from \( \texttt{REG_F} \) to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{REG_F} \) |
| 4 | MOVAINT | 0b00000101 | Move value from \( \texttt{REG_INT} \) to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{REG_INT} \) |
| 5 | MOVBA | 0b00000110 | Move value from \( \texttt{REG_A} \) to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{REG_A} \) |
| 6 | MOVBTH | 0b00000111 | Move value from \( \texttt{REG_TMPH} \) to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{REG_TMPH} \) |
| 7 | MOVBTL | 0b00001000 | Move value from \( \texttt{REG_TMPL} \) to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{REG_TMPL} \) |
| 8 | MOVBF | 0b00001001 | Move value from \( \texttt{REG_F} \) to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{REG_F} \) |
| 9 | MOVBINT | 0b00001010 | Move value from \( \texttt{REG_INT} \) to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{REG_INT} \) |
| 10 | MOVTHA | 0b00001011 | Move value from \( \texttt{REG_A} \) to \( \texttt{REG_TMPH} \) | 3 | \( \texttt{REG_TMPH} \leftarrow \texttt{REG_A} \) |
| 11 | MOVTHB | 0b00001100 | Move value from \( \texttt{REG_B} \) to \( \texttt{REG_TMPH} \) | 3 | \( \texttt{REG_TMPH} \leftarrow \texttt{REG_B} \) |
| 12 | MOVTHTL | 0b00001101 | Move value from \( \texttt{REG_TMPL} \) to \( \texttt{REG_TMPH} \) | 3 | \( \texttt{REG_TMPH} \leftarrow \texttt{REG_TMPL} \) |
| 13 | MOVTHF | 0b00001110 | Move value from \( \texttt{REG_F} \) to \( \texttt{REG_TMPH} \) | 3 | \( \texttt{REG_TMPH} \leftarrow \texttt{REG_F} \) |
| 14 | MOVTHINT | 0b00001111 | Move value from \( \texttt{REG_INT} \) to \( \texttt{REG_TMPH} \) | 3 | \( \texttt{REG_TMPH} \leftarrow \texttt{REG_INT} \) |
| 15 | MOVTLA | 0b00010000 | Move value from \( \texttt{REG_A} \) to \( \texttt{REG_TMPL} \) | 3 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) |
| 16 | MOVTLB | 0b00010001 | Move value from \( \texttt{REG_B} \) to \( \texttt{REG_TMPL} \) | 3 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) |
| 17 | MOVTLTH | 0b00010010 | Move value from \( \texttt{REG_TMPH} \) to \( \texttt{REG_TMPL} \) | 3 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) |
| 18 | MOVTLF | 0b00010011 | Move value from \( \texttt{REG_F} \) to \( \texttt{REG_TMPL} \) | 3 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_F} \) |
| 19 | MOVTLINT | 0b00010100 | Move value from \( \texttt{REG_INT} \) to \( \texttt{REG_TMPL} \) | 3 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_INT} \) |
| 20 | MOVAIMM | 0b00010101 | Move given constant to \( \texttt{REG_A} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) |
| 21 | MOVBIMM | 0b00010110 | Move given constant to \( \texttt{REG_B} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_B} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) |
| 22 | MOVTHIMM | 0b00010111 | Move given constant to \( \texttt{REG_TMPH} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) |
| 23 | MOVTLIMM | 0b00011000 | Move given constant to \( \texttt{REG_TMPL} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) |
| 24 | MOVAABS | 0b00011001 | Move constant from memory at given address to \( \texttt{REG_A} \) | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR]} \) |
| 25 | MOVAABSZP | 0b00011010 | Move constant from zero page memory at given address to \( \texttt{REG_A} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 26 | MOVBABS | 0b00011011 | Move constant from memory at given address to \( \texttt{REG_B} \) | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR]} \) |
| 27 | MOVBABSZP | 0b00011100 | Move constant from zero page memory at given address to \( \texttt{REG_B} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_B} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 28 | MOVAATT | 0b00011101 | Move value from memory at address given by value of \( \texttt{REG_TMP} \) to \( \texttt{REG_A} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR]} \) |
| 29 | MOVBATT | 0b00011110 | Move value from memory at address given by value of \( \texttt{REG_TMP} \) to \( \texttt{REG_B} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_B} \leftarrow \texttt{MEM[REG_MAR]} \) |
| 30 | MOVAATB | 0b00011111 | Move value from zero page memory at address given by value of \( \texttt{REG_B} \) to \( \texttt{REG_A} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 31 | MOVAATTH | 0b00100000 | Move value from zero page memory at address given by value of \( \texttt{REG_TMPH} \) to \( \texttt{REG_A} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 32 | MOVAATTL | 0b00100001 | Move value from zero page memory at address given by value of \( \texttt{REG_TMPL} \) to \( \texttt{REG_A} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 33 | MOVBATA | 0b00100010 | Move value from zero page memory at address given by value of \( \texttt{REG_A} \) to \( \texttt{REG_B} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_B} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 34 | MOVBATTH | 0b00100011 | Move value from zero page memory at address given by value of \( \texttt{REG_TMPH} \) to \( \texttt{REG_B} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_B} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 35 | MOVBATTL | 0b00100100 | Move value from zero page memory at address given by value of \( \texttt{REG_TMPL} \) to \( \texttt{REG_B} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_B} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 36 | MOVTHATA | 0b00100101 | Move value from zero page memory at address given by value of \( \texttt{REG_A} \) to \( \texttt{REG_TMPH} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 37 | MOVTHATB | 0b00100110 | Move value from zero page memory at address given by value of \( \texttt{REG_B} \) to \( \texttt{REG_TMPH} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 38 | MOVTHATTL | 0b00100111 | Move value from zero page memory at address given by value of \( \texttt{REG_TMPL} \) to \( \texttt{REG_TMPH} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 39 | MOVTLATA | 0b00101000 | Move value from zero page memory at address given by value of \( \texttt{REG_A} \) to \( \texttt{REG_TMPL} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 40 | MOVTLATB | 0b00101001 | Move value from zero page memory at address given by value of \( \texttt{REG_B} \) to \( \texttt{REG_TMPL} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 41 | MOVTLATTH | 0b00101010 | Move value from zero page memory at address given by value of \( \texttt{REG_TMPH} \) to \( \texttt{REG_TMPL} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR & 0xFF]} \) |
| 42 | MOVATABSA | 0b00101011 | Move value from \( \texttt{REG_A} \) to memory at given address | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_A} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 43 | MOVATABSAZP | 0b00101100 | Move value from \( \texttt{REG_A} \) to zero page memory at given address | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_A} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 44 | MOVATABSB | 0b00101101 | Move value from \( \texttt{REG_B} \) to memory at given address | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_B} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 45 | MOVATABSBZP | 0b00101110 | Move value from \( \texttt{REG_B} \) to zero page memory at given address | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_B} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 46 | MOVATABSINT | 0b00101111 | Move value from \( \texttt{REG_INT} \) to memory at given address | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_INT} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 47 | MOVATABSINTZP | 0b00110000 | Move value from \( \texttt{REG_INT} \) to zero page memory at given address | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_INT} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 48 | MOVATABSIMM | 0b00110001 | Move given constant to memory at given address | 10 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 49 | MOVATABSIMMZP | 0b00110010 | Move given constant to zero page memory at given address | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 50 | MOVATTA | 0b00110011 | Move value from \( \texttt{REG_A} \) to memory at address given by value of \( \texttt{REG_TMP} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_A} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 51 | MOVATTB | 0b00110100 | Move value from \( \texttt{REG_B} \) to memory at address given by value of \( \texttt{REG_TMP} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_B} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 52 | MOVATTINT | 0b00110101 | Move value from \( \texttt{REG_INT} \) to memory at address given by value of \( \texttt{REG_TMP} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_INT} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 53 | MOVATAB | 0b00110110 | Move value from \( \texttt{REG_B} \) to zero page memory at address given by value of \( \texttt{REG_A} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_B} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 54 | MOVATATH | 0b00110111 | Move value from \( \texttt{REG_TMPH} \) to zero page memory at address given by value of \( \texttt{REG_A} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPH} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 55 | MOVATATL | 0b00111000 | Move value from \( \texttt{REG_TMPL} \) to zero page memory at address given by value of \( \texttt{REG_A} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPL} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 56 | MOVATBA | 0b00111001 | Move value from \( \texttt{REG_A} \) to zero page memory at address given by value of \( \texttt{REG_B} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_A} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 57 | MOVATBTH | 0b00111010 | Move value from \( \texttt{REG_TMPH} \) to zero page memory at address given by value of \( \texttt{REG_B} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPH} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 58 | MOVATBTL | 0b00111011 | Move value from \( \texttt{REG_TMPL} \) to zero page memory at address given by value of \( \texttt{REG_B} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPL} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 59 | MOVATTHA | 0b00111100 | Move value from \( \texttt{REG_A} \) to zero page memory at address given by value of \( \texttt{REG_TMPH} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_A} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 60 | MOVATTHB | 0b00111101 | Move value from \( \texttt{REG_B} \) to zero page memory at address given by value of \( \texttt{REG_TMPH} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_B} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 61 | MOVATTHTL | 0b00111110 | Move value from \( \texttt{REG_TMPL} \) to zero page memory at address given by value of \( \texttt{REG_TMPH} \) | 5 | \( \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPL} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 62 | MOVATTLA | 0b00111111 | Move value from \( \texttt{REG_A} \) to zero page memory at address given by value of \( \texttt{REG_TMPL} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_A} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 63 | MOVATTLB | 0b01000000 | Move value from \( \texttt{REG_B} \) to zero page memory at address given by value of \( \texttt{REG_TMPL} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_B} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 64 | MOVATTLTH | 0b01000001 | Move value from \( \texttt{REG_TMPH} \) to zero page memory at address given by value of \( \texttt{REG_TMPL} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPH} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 65 | MOVATTIMM | 0b01000010 | Move given constant to memory at address given by value of \( \texttt{REG_TMP} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 66 | MOVATAIMM | 0b01000011 | Move given constant to zero page memory at address given by value of \( \texttt{REG_A} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \ \& \ \texttt{REG_TMPL} \leftarrow \texttt{REG_A} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 67 | MOVATBIMM | 0b01000100 | Move given constant to zero page memory at address given by value of \( \texttt{REG_B} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \ \& \ \texttt{REG_TMPL} \leftarrow \texttt{REG_B} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 68 | MOVATTHIMM | 0b01000101 | Move given constant to zero page memory at address given by value of \( \texttt{REG_TMPH} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \ \& \ \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 69 | MOVATTLIMM | 0b01000110 | Move given constant to zero page memory at address given by value of \( \texttt{REG_TMPL} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \ \& \ \texttt{REG_TMPL} \leftarrow \texttt{REG_TMPL} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
ALU Instructions
| No. | Name | Opcode | Description | Total Cycles Number | Executed Microcodes |
|---|---|---|---|---|---|
| 70 | NEGAA | 0b01000111 | Calculate negation of \( \texttt{REG_A} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (-\texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 71 | NEGAB | 0b01001000 | Calculate negation of \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (-\texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 72 | NEGBA | 0b01001001 | Calculate negation of \( \texttt{REG_A} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (-\texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 73 | NEGBB | 0b01001010 | Calculate negation of \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (-\texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 74 | NEGMEMA | 0b01001011 | Calculate negation of \( \texttt{REG_A} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (-\texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 75 | NEGMEMB | 0b01001100 | Calculate negation of \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (-\texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 76 | NEGMEMZPA | 0b01001101 | Calculate negation of \( \texttt{REG_A} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (-\texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 77 | NEGMEMZPB | 0b01001110 | Calculate negation of \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (-\texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 78 | NEGSTCA | 0b01001111 | Calculate negation of \( \texttt{REG_A} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (-\texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 79 | NEGSTCB | 0b01010000 | Calculate negation of \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (-\texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 80 | ADDA | 0b01010001 | Calculate sum of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A + REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 81 | ADDB | 0b01010010 | Calculate sum of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A + REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 82 | ADDMEM | 0b01010011 | Calculate sum of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A + REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 83 | ADDMEMZP | 0b01010100 | Calculate sum of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A + REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 84 | ADDSTC | 0b01010101 | Calculate sum of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A + REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 85 | SUBAAB | 0b01010110 | Calculate difference of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A - REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 86 | SUBABA | 0b01010111 | Calculate difference of \( \texttt{REG_B} \) and \( \texttt{REG_A} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_B - REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 87 | SUBBAB | 0b01011000 | Calculate difference of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A - REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 88 | SUBBBA | 0b01011001 | Calculate difference of \( \texttt{REG_B} \) and \( \texttt{REG_A} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_B - REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 89 | SUBMEMAB | 0b01011010 | Calculate difference of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A - REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 90 | SUBMEMBA | 0b01011011 | Calculate difference of \( \texttt{REG_B} \) and \( \texttt{REG_A} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B - REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 91 | SUBMEMZPAB | 0b01011100 | Calculate difference of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A - REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 92 | SUBMEMZPBA | 0b01011101 | Calculate difference of \( \texttt{REG_B} \) and \( \texttt{REG_A} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B - REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 93 | SUBSTCAB | 0b01011110 | Calculate difference of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A - REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 94 | SUBSTCBA | 0b01011111 | Calculate difference of \( \texttt{REG_B} \) and \( \texttt{REG_A} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B - REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 95 | DIV2AA | 0b01100000 | Calculate quotient of \( \texttt{REG_A} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 96 | DIV2AB | 0b01100001 | Calculate quotient of \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_B}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 97 | DIV2BA | 0b01100010 | Calculate quotient of \( \texttt{REG_A} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 98 | DIV2BB | 0b01100011 | Calculate quotient of \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_B}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 99 | DIV2MEMA | 0b01100100 | Calculate quotient of \( \texttt{REG_A} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 100 | DIV2MEMB | 0b01100101 | Calculate quotient of \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 101 | DIV2MEMZPA | 0b01100110 | Calculate quotient of \( \texttt{REG_A} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 102 | DIV2MEMZPB | 0b01100111 | Calculate quotient of \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}/2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 103 | DIV2STCA | 0b01101000 | Calculate quotient of \( \texttt{REG_A} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}/2) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 104 | DIV2STCB | 0b01101001 | Calculate quotient of \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}/2) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 105 | INVAA | 0b01101010 | Calculate bit inversion of \( \texttt{REG_A} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (not \ \texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 106 | INVAB | 0b01101011 | Calculate bit inversion of \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (not \ \texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 107 | INVBA | 0b01101100 | Calculate bit inversion of \( \texttt{REG_A} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (not \ \texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 108 | INVBB | 0b01101101 | Calculate bit inversion of \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (not \ \texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 109 | INVMEMA | 0b01101110 | Calculate bit inversion of \( \texttt{REG_A} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (not \ \texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 110 | INVMEMB | 0b01101111 | Calculate bit inversion of \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (not \ \texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 111 | INVMEMZPA | 0b01110000 | Calculate bit inversion of \( \texttt{REG_A} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (not \ \texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 112 | INVMEMZPB | 0b01110001 | Calculate bit inversion of \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (not \ \texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 113 | INVSTCA | 0b01110010 | Calculate bit inversion of \( \texttt{REG_A} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (not \ \texttt{REG_A}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 114 | INVSTCB | 0b01110011 | Calculate bit inversion of \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (not \ \texttt{REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 115 | ORA | 0b01110100 | Calculate alternative of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A or REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 116 | ORB | 0b01110101 | Calculate alternative of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A or REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 117 | ORMEM | 0b01110110 | Calculate alternative of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A or REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 118 | ORMEMZP | 0b01110111 | Calculate alternative of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A or REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 119 | ORSTC | 0b01111000 | Calculate alternative of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A or REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 120 | ANDA | 0b01111001 | Calculate conjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A and REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 121 | ANDB | 0b01111010 | Calculate conjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A and REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 122 | ANDMEM | 0b01111011 | Calculate conjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A and REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 123 | ANDMEMZP | 0b01111100 | Calculate conjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A and REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 124 | ANDSTC | 0b01111101 | Calculate conjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A and REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 125 | XORA | 0b01111110 | Calculate exclusive disjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A xor REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 126 | XORB | 0b01111111 | Calculate exclusive disjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A xor REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 127 | XORMEM | 0b10000000 | Calculate exclusive disjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A xor REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 128 | XORMEMZP | 0b10000001 | Calculate exclusive disjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A xor REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 129 | XORSTC | 0b10000010 | Calculate exclusive disjunction of \( \texttt{REG_A} \) and \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A xor REG_B}) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 130 | SHRAA | 0b10000011 | Calculate right shift of \( \texttt{REG_A} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 131 | SHRAB | 0b10000100 | Calculate right shift of \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_B}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 132 | SHRBA | 0b10000101 | Calculate right shift of \( \texttt{REG_A} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 133 | SHRBB | 0b10000110 | Calculate right shift of \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_B}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 134 | SHRMEMA | 0b10000111 | Calculate right shift of \( \texttt{REG_A} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 135 | SHRMEMB | 0b10001000 | Calculate right shift of \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 136 | SHRMEMZPA | 0b10001001 | Calculate right shift of \( \texttt{REG_A} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 137 | SHRMEMZPB | 0b10001010 | Calculate right shift of \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 138 | SHRSTCA | 0b10001011 | Calculate right shift of \( \texttt{REG_A} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 139 | SHRSTCB | 0b10001100 | Calculate right shift of \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}>>2) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 140 | SHLAA | 0b10001101 | Calculate left shift of \( \texttt{REG_A} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_A}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 141 | SHLAB | 0b10001110 | Calculate left shift of \( \texttt{REG_B} \) and save it to \( \texttt{REG_A} \) | 3 | \( \texttt{REG_A} \leftarrow (\texttt{REG_B}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 142 | SHLBA | 0b10001111 | Calculate left shift of \( \texttt{REG_A} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_A}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 143 | SHLBB | 0b10010000 | Calculate left shift of \( \texttt{REG_B} \) and save it to \( \texttt{REG_B} \) | 3 | \( \texttt{REG_B} \leftarrow (\texttt{REG_B}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 144 | SHLMEMA | 0b10010001 | Calculate left shift of \( \texttt{REG_A} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 145 | SHLMEMB | 0b10010010 | Calculate left shift of \( \texttt{REG_B} \) and save it to memory at given address | 9 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 146 | SHLMEMZPA | 0b10010011 | Calculate left shift of \( \texttt{REG_A} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 147 | SHLMEMZPB | 0b10010100 | Calculate left shift of \( \texttt{REG_B} \) and save it to zero page memory at given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
| 148 | SHLSTCA | 0b10010101 | Calculate left shift of \( \texttt{REG_A} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_A}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 149 | SHLSTCB | 0b10010110 | Calculate left shift of \( \texttt{REG_B} \) and save it to stack | 4 | \( \texttt{REG_MBR} \leftarrow (\texttt{REG_B}<<2) \) \( \ \& \ \texttt{save flags to REG_F} \ \& \ \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 150 | CMPAB | 0b10010111 | Save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 3 | \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 151 | CMPBA | 0b10011000 | Save flags of operation \( \texttt{REG_B} - \texttt{REG_A} \) to \( \texttt{REG_F} \) | 3 | \( \texttt{calculate REG_B - REG_A} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 152 | CMPTHTL | 0b10011001 | Move \( \texttt{REG_TMPH} \) to \( \texttt{REG_A} \), \( \texttt{REG_TMPL} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 5 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPH} \) \( \texttt{REG_B} \leftarrow \texttt{REG_TMPL} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 153 | CMPTLTH | 0b10011010 | Move \( \texttt{REG_TMPL} \) to \( \texttt{REG_A} \), \( \texttt{REG_TMPH} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 5 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPL} \) \( \texttt{REG_B} \leftarrow \texttt{REG_TMPH} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 154 | CMPTHA | 0b10011011 | Move \( \texttt{REG_TMPH} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_B} \leftarrow \texttt{REG_TMPH} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 155 | CMPATH | 0b10011100 | Move \( \texttt{REG_TMPH} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_B} - \texttt{REG_A} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_B} \leftarrow \texttt{REG_TMPH} \) \( \texttt{calculate REG_B - REG_A} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 156 | CMPTHB | 0b10011101 | Move \( \texttt{REG_TMPH} \) to \( \texttt{REG_A} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPH} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 157 | CMPBTH | 0b10011110 | Move \( \texttt{REG_TMPH} \) to \( \texttt{REG_A} \) and save flags of operation \( \texttt{REG_B} - \texttt{REG_A} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPH} \) \( \texttt{calculate REG_B - REG_A} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 158 | CMPTLA | 0b10011111 | Move \( \texttt{REG_TMPL} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_B} \leftarrow \texttt{REG_TMPL} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 159 | CMPATL | 0b10100000 | Move \( \texttt{REG_TMPL} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_B} - \texttt{REG_A} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_B} \leftarrow \texttt{REG_TMPL} \) \( \texttt{calculate REG_B - REG_A} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 160 | CMPTLB | 0b10100001 | Move \( \texttt{REG_TMPL} \) to \( \texttt{REG_A} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPL} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 161 | CMPBTL | 0b10100010 | Move \( \texttt{REG_TMPL} \) to \( \texttt{REG_A} \) and save flags of operation \( \texttt{REG_B} - \texttt{REG_A} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_A} \leftarrow \texttt{REG_TMPL} \) \( \texttt{calculate REG_B - REG_A} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 162 | CMPINTA | 0b10100011 | Move \( \texttt{REG_INT} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_B} \leftarrow \texttt{REG_INT} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 163 | CMPAINT | 0b10100100 | Move \( \texttt{REG_INT} \) to \( \texttt{REG_B} \) and save flags of operation \( \texttt{REG_B} - \texttt{REG_A} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_B} \leftarrow \texttt{REG_INT} \) \( \texttt{calculate REG_B - REG_A} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 164 | CMPINTB | 0b10100101 | Move \( \texttt{REG_INT} \) to \( \texttt{REG_A} \) and save flags of operation \( \texttt{REG_A} - \texttt{REG_B} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_A} \leftarrow \texttt{REG_INT} \) \( \texttt{calculate REG_A - REG_B} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 165 | CMPBINT | 0b10100110 | Move \( \texttt{REG_INT} \) to \( \texttt{REG_A} \) and save flags of operation \( \texttt{REG_B} - \texttt{REG_A} \) to \( \texttt{REG_F} \) | 4 | \( \texttt{REG_A} \leftarrow \texttt{REG_INT} \) \( \texttt{calculate REG_B - REG_A} \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 166 | CLRA | 0b10100111 | Set value of \( \texttt{REG_A} \) to \( \texttt{0} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{0} \) |
| 167 | CLRB | 0b10101000 | Set value of \( \texttt{REG_B} \) to \( \texttt{0} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{0} \) |
| 168 | CLRTH | 0b10101001 | Set value of \( \texttt{REG_TMPH} \) to \( \texttt{0} \) | 3 | \( \texttt{REG_TMPH} \leftarrow \texttt{0} \) |
| 169 | CLRTL | 0b10101010 | Set value of \( \texttt{REG_TMPL} \) to \( \texttt{0} \) | 3 | \( \texttt{REG_TMPL} \leftarrow \texttt{0} \) |
| 170 | CLRT | 0b10101011 | Set value of \( \texttt{REG_TMP} \) to \( \texttt{0} \) | 3 | \( \texttt{REG_TMPH} \leftarrow \texttt{0} \ \& \ \texttt{REG_TMPL} \leftarrow \texttt{0} \) |
| 171 | INCA | 0b10101100 | Increment value of \( \texttt{REG_A} \) and save flags to \( \texttt{REG_F} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{REG_A} + 1 \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 172 | INCB | 0b10101101 | Increment value of \( \texttt{REG_B} \) and save flags to \( \texttt{REG_F} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{REG_B} + 1 \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 173 | INCT | 0b10101110 | Increment value of \( \texttt{REG_TMP} \) and save flags to \( \texttt{REG_F} \) | 3 | \( \texttt{REG_TMP} \leftarrow \texttt{REG_TMP} + 1 \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 174 | DECA | 0b10101111 | Decrement value of \( \texttt{REG_A} \) and save flags to \( \texttt{REG_F} \) | 3 | \( \texttt{REG_A} \leftarrow \texttt{REG_A} - 1 \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 175 | DECB | 0b10110000 | Decrement value of \( \texttt{REG_B} \) and save flags to \( \texttt{REG_F} \) | 3 | \( \texttt{REG_B} \leftarrow \texttt{REG_B} - 1 \) \( \ \& \ \texttt{save flags to REG_F} \) |
| 176 | DECT | 0b10110001 | Decrement value of \( \texttt{REG_TMP} \) and save flags to \( \texttt{REG_F} \) | 3 | \( \texttt{REG_TMP} \leftarrow \texttt{REG_TMP} - 1 \) \( \ \& \ \texttt{save flags to REG_F} \) |
Jump Instructions
| No. | Name | Opcode | Description | Total Cycles Number | Executed Microcodes |
|---|---|---|---|---|---|
| 177 | JMPIMM | 0b10110010 | Jump to given address | 7 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{PC} \leftarrow \texttt{REG_TMP} \) |
| 178 | JMPIMMS | 0b10110011 | Jump to given address if sign flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 179 | JMPIMMNS | 0b10110100 | Jump to given address if sign flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 180 | JMPIMMTS | 0b10110101 | Jump to address from \( \texttt{REG_TMP} \) if sign flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 181 | JMPIMMTNS | 0b10110110 | Jump to address from \( \texttt{REG_TMP} \) if sign flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 182 | JMPIMMP | 0b10110111 | Jump to given address if parity flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 183 | JMPIMMNP | 0b10111000 | Jump to given address if parity flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 184 | JMPIMMTP | 0b10111001 | Jump to address from \( \texttt{REG_TMP} \) if parity flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 185 | JMPIMMTNP | 0b10111010 | Jump to address from \( \texttt{REG_TMP} \) if parity flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 186 | JMPIMMZ | 0b10111011 | Jump to given address if zero flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 187 | JMPIMMNZ | 0b10111100 | Jump to given address if zero flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 188 | JMPIMMTZ | 0b10111101 | Jump to address from \( \texttt{REG_TMP} \) if zero flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 189 | JMPIMMTNZ | 0b10111110 | Jump to address from \( \texttt{REG_TMP} \) if zero flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 190 | JMPIMMC | 0b10111111 | Jump to given address if carry flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 191 | JMPIMMNC | 0b11000000 | Jump to given address if carry flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 192 | JMPIMMTC | 0b11000001 | Jump to address from \( \texttt{REG_TMP} \) if carry flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 193 | JMPIMMTNC | 0b11000010 | Jump to address from \( \texttt{REG_TMP} \) if carry flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 194 | JMPIMMO | 0b11000011 | Jump to given address if overflow flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 195 | JMPIMMNO | 0b11000100 | Jump to given address if overflow flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMM} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 196 | JMPIMMTO | 0b11000101 | Jump to address from \( \texttt{REG_TMP} \) if overflow flag is set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 197 | JMPIMMTNO | 0b11000110 | Jump to address from \( \texttt{REG_TMP} \) if overflow flag is not set | 7 or 4 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPIMMT} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP2} \) |
| 198 | JMPREL | 0b11000111 | Jump to address with given offset from current address | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{REG_TMP} \leftarrow \texttt{PC} \) \( \texttt{REG_B} \leftarrow \texttt{REG_TMPL} \) \( \texttt{REG_TMPL} \leftarrow \texttt{REG_A} + \texttt{REG_B} \) |
| 199 | JMPRELS | 0b11001000 | Jump to address with given offset if sign flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 200 | JMPRELNS | 0b11001001 | Jump to address with given offset if sign flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 201 | JMPRELTLS | 0b11001010 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if sign flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 202 | JMPRELTLNS | 0b11001011 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if sign flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[0]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 203 | JMPRELP | 0b11001100 | Jump to address with given offset if parity flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 204 | JMPRELNP | 0b11001101 | Jump to address with given offset if parity flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 205 | JMPRELTLP | 0b11001110 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if parity flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 206 | JMPRELTLNP | 0b11001111 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if parity flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[1]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 207 | JMPRELZ | 0b11010000 | Jump to address with given offset if zero flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 208 | JMPRELNZ | 0b11010001 | Jump to address with given offset if zero flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 209 | JMPRELTLZ | 0b11010010 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if zero flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 210 | JMPRELTLNZ | 0b11010011 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if zero flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[2]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 211 | JMPRELC | 0b11010100 | Jump to address with given offset if carry flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 212 | JMPRELNC | 0b11010101 | Jump to address with given offset if carry flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 213 | JMPRELTLC | 0b11010110 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if carry flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 214 | JMPRELTLNC | 0b11010111 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if carry flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[3]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 215 | JMPRELO | 0b11011000 | Jump to address with given offset if overflow flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 216 | JMPRELNO | 0b11011001 | Jump to address with given offset if overflow flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPREL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 217 | JMPRELTLO | 0b11011010 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if overflow flag is set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 218 | JMPRELTLNO | 0b11011011 | Jump to address with given offset from \( \texttt{REG_TMPL} \) if overflow flag is not set | 6 or 3 | \( \texttt{if} \ \texttt{REG_F[4]} \ \texttt{is not set:} \) \( \ \ \texttt{JMPRELTL} \) \( \texttt{else:} \) \( \ \ \texttt{SKIP1} \) |
| 219 | JMPFUN | 0b11011100 | Push \( \texttt{PC} \) to stack and jump to given address | 12 | \( \texttt{REG_TMP} \leftarrow \texttt{PC} \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPL} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPH} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{PC} \leftarrow \texttt{REG_TMP} \) |
| 220 | JMPRET | 0b11011101 | Pop address from stack and jump to it | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) \( \texttt{PC} \leftarrow \texttt{REG_TMP} \) \( \texttt{PC} \leftarrow \texttt{PC} + 1 \) |
Stack Instructions
| No. | Name | Opcode | Description | Total Cycles Number | Executed Microcodes |
|---|---|---|---|---|---|
| 221 | PUSHA | 0b11011110 | Push value of \( \texttt{REG_A} \) to stack | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_A} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 222 | PUSHB | 0b11011111 | Push value of \( \texttt{REG_B} \) to stack | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_B} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 223 | PUSHTH | 0b11100000 | Push value of \( \texttt{REG_TMPH} \) to stack | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPH} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 224 | PUSHTL | 0b11100001 | Push value of \( \texttt{REG_TMPL} \) to stack | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPL} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 225 | PUSHF | 0b11100010 | Push value of \( \texttt{REG_F} \) to stack | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_F} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 226 | PUSHINT | 0b11100011 | Push value of \( \texttt{REG_INT} \) to stack | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_INT} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 227 | PUSHT | 0b11100100 | Push value of \( \texttt{REG_TMP} \) to stack | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPH} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPL} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 228 | PUSHIMM | 0b11100101 | Push given constant to stack | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 229 | PUSHABS | 0b11100110 | Push value from given address to stack | 10 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 230 | PUSHABSZP | 0b11100111 | Push value from given zero page address to stack | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) |
| 231 | POPA | 0b11101000 | Pop value from stack to \( \texttt{REG_A} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_A} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) |
| 232 | POPB | 0b11101001 | Pop value from stack to \( \texttt{REG_B} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_B} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) |
| 233 | POPTH | 0b11101010 | Pop value from stack to \( \texttt{REG_TMPH} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) |
| 234 | POPTL | 0b11101011 | Pop value from stack to \( \texttt{REG_TMPL} \) | 4 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) |
| 235 | POPT | 0b11101100 | Pop value from stack to \( \texttt{REG_TMP} \) | 6 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) |
| 236 | POPMEM | 0b11101101 | Pop value from stack to memory at given address | 10 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \) |
| 237 | POPMEMZP | 0b11101110 | Pop value from stack to zero page memory at given address | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_MBR} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{REG_TMP} \) \( \texttt{MEM[REG_MAR & 0xFF]} \leftarrow \texttt{REG_MBR} \) |
Other Instructions
| No. | Name | Opcode | Description | Total Cycles Number | Executed Microcodes |
|---|---|---|---|---|---|
| 238 | NOP | 0b11101111 | No nothing for one cycle | 3 | \( \texttt{do nothing} \) |
| 239 | SKIP | 0b11110000 | Skip instruction | 2 | |
| 240 | SKIP1 | 0b11110001 | Skip next program line | 3 | \( \texttt{PC} \leftarrow \texttt{PC} + 1 \) |
| 241 | SKIP2 | 0b11110010 | Skip next two program lines | 4 | \( \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{PC} \leftarrow \texttt{PC} + 1 \) |
| 242 | ISR | 0b11110011 | Enter interrupt service routine | 12 | \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMP} \leftarrow \texttt{PC} \ \& \ \texttt{set ISR flag} \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPL} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \ \& \ \texttt{REG_MBR} \leftarrow \texttt{REG_TMPH} \) \( \texttt{MEM[REG_MAR]} \leftarrow \texttt{REG_MBR} \ \& \ \texttt{STC} \leftarrow \texttt{STC} - 1 \) \( \texttt{PC} \leftarrow \texttt{ISR address} \ \& \ \texttt{MAR} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{PC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{PC} \leftarrow \texttt{PC} + 1 \) \( \texttt{PC} \leftarrow \texttt{REG_TMP} \) |
| 243 | IRET | 0b11110100 | Return from interrupt service routine | 8 | \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPH} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) \( \texttt{REG_MAR} \leftarrow \texttt{STC} \) \( \texttt{REG_TMPL} \leftarrow \texttt{MEM[REG_MAR]} \ \& \ \texttt{STC} \leftarrow \texttt{STC} + 1 \) \( \texttt{PC} \leftarrow \texttt{REG_TMP} \) \( \texttt{PC} \leftarrow \texttt{PC} + 1 \ \& \ \texttt{reset ISR flag} \) |
| 244 | INT0 | 0b11110101 | Trigger interrupt 0 | 3 | \( \texttt{INTERRUPT0} \) |
| 245 | INT1 | 0b11110110 | Trigger interrupt 1 | 3 | \( \texttt{INTERRUPT1} \) |
| 246 | INT2 | 0b11110111 | Trigger interrupt 2 | 3 | \( \texttt{INTERRUPT2} \) |
| 247 | INT3 | 0b11111000 | Trigger interrupt 3 | 3 | \( \texttt{INTERRUPT3} \) |
| 248 | INT4 | 0b11111001 | Trigger interrupt 4 | 3 | \( \texttt{INTERRUPT4} \) |
| 249 | HALT | 0b11111010 | Stop executing program | 2 | \( \texttt{HALT} \) |